An electronic device such as a liquid crystal display device includes a semiconductor device which includes a TFT for controlling driving of a pixel. For example, according to a liquid crystal display device, a driver including a TFT, a switching element, and the like, is formed on an active matrix substrate. It is commonly known that the TFT which is used as a driver or a switching element in an electronic device brings the following advantages to the electronic device: low power consumption, high performances, high-speed operation, and downsizing. Using a resistance of a diffusion layer of the TFT, the TFT can be used as a three terminal type-variable resistance element composed of gate, source, and drain. The resistance of such a resistance element can be normally adjusted by a bias voltage (Vgs) which is applied to the gate. In this case, the TFT is incorporated in an integrated circuit to be arranged at various positions of the electronic device in order to exhibit the following effects: determining a gain in a feedback amplifying circuit; dividing a voltage; applying bias to the element; and determining a value of time constant (RC) of an active filter (for example, refer to Patent Document 1).
However, the TFT in Patent Document 1 has a double-gate structure in order to secure a high resistance, and the number of production steps is larger than the number of production steps needed for forming a normal TFT having a single gate. Also in the obtained TFT, the resistance largely varies depending on the variation in thickness of the gate insulating film. Further, in the resistance element that is a silicon which is just doped with impurities, the resistance value largely varies depending on variation in concentration of the impurities. As a result, a voltage or a current the circuit needs is inaccurately determined.
Under the above-mentioned circumstances, the following electronic device is disclosed (for example, refer to Patent Document 2). The electronic device includes a circuit operation FET having a salicide structure on its surface and a resistance element FET having no salicide structure on its surface, in which the FETs are arranged on the same semiconductor substrate, and thereby the length of the resistance of the resistance element can be suppressed. Further, the following semiconductor device which has a bleeder resistance circuit is disclosed (for example, refer to Patent Document 3). According to this semiconductor device, the thickness of a polysilicon resistor is decreased and then P-type impurities are injected into the polysilicon thin film resistor, and thereby a variation in resistance and temperature dependency of resistance can be suppressed. However, in the Patent Document 2, the FET is limited to one having a salicide structure. In the Patent Document 3, the semiconductor device is limited to one including a bleeder resistance circuit. Therefore, in both of the Patent Documents 2 and 3, the applications are limited. In each of Patent Documents 2 and 3, the structure, the production steps, and the like, are largely different between the TFT that is used as a resistance element and the TFT that performs driving control. Then, the number of steps of the production process is increased. Therefore, there is still room for improvement.
[Patent Document 1]
Japanese Kokai. Publication No. Hei-05-152571
[Patent Document 2]
Japanese Kokai Publication No. 2000-31295
[Patent Document 3]
Japanese Kokai Publication No. 2003-273233